Modeling Of SOI MOSFET Based On BSIM-BULK Model

In recent years,with the rapid development of Moore’s Law in semiconductor technology,the complementary metal oxide semiconductor(CMOS)bulk silicon process has faced significant performance challenges.The continuous increase in chip area and shrinking device size have driven the rapid development of ultra large scale integrated circuits.However,when the gate length of MOSFETs is reduced to a certain extent,such as below 40 nm,adverse secondary effects become increasingly severe,such as the short channel effect that affects the threshold voltage,the gradually increasing leakage current,and the increasingly prominent latch effect problem.This has led to a bottleneck in the development of organic silicon technology,which cannot continue to advance according to Moore’s law.Silicon On Insulator(SOI)is a technology that has been widely used in recent years.Its structure is fully dielectric isolation,which can effectively compensate for the defects and shortcomings of the silicon technology.The demand for SOI technology is constantly increasing,while also placing higher demands on SOI device models.Although BSIM-BULK model was developed for bulk silicon MOSFET,it has excellent source/drain symmetry and is very suitable for RF modeling of SOI MOSFET.Based on the BSIM-BULK model,this thesis develops its device model suitable for SOI MOSFET.The main contents are as follows:(1)The process technology,physical structure and working principle of SOI devices are introduced,and the advantages of SOI compared with bulk silicon process CMOS are explained.The electrical characteristics and internal physical mechanism of SOI devices are studied according to their physical structures.(2)The industry standard models applicable to SOI devices were studied and analyzed.The comparison showed that BSIM-BULK model was more mature than BSIM SOI device model,and the sourcing-drain symmetry was very good when Vds=0V.Therefore,BSIM-BULK was selected as the basic model of SOI device.By adding the substrate parasitic network and RF peripheral parasitic network,the model can be applied to SOI devices,and the application range of the model is expanded.(3)Based on the test data of a homemade SOI MOSFET device with 65 nm technology,a set of intrinsic part modeling methods,including current model and capacitance model,are proposed.The model characteristic curves obtained by parameter extraction achieve better fitting accuracy.(4)A transistor peripheral parasitic network is applied to the extraction of RF small signal model parameters,and the S-parameter extraction results are well fitted.Combined with the harmonic nonlinear simulation circuit structure,the model is simulated with third harmonic.The results show that BSIM-BULK can be used for RF modeling of SOI MOSFET devices with good accuracy and convergence.