Research On The Implementation Of 8K Ultra-high-definition HDMI Interface Video Signal Source Based On FPG

The development of 8K ultra-high definition(UHD)video is unstoppable,and major TV manufacturers are striving to develop and produce TVs and display devices that support8 K UHD video signals.Therefore,the 8K UHD video signal source required for testing the performance of TV mainboards in the production testing process is crucial for manufacturers.However,in the production and transmission process of 8K ultra-highdefinition video signals,there are issues such as high information volume of the video signal source,high transmission clock frequency and transmission bitrate,and unstable signal transmission.Therefore,TV manufacturers generally need a video signal source that can continuously and stably output 8K UHD video signals.This thesis designs an ultra high definition video signal source based on Field Programmable Gate Array(FPGA)under the above background and requirements.The system uses the ARTIX-7 series XC7A100 T chip as the core processor,and is designed with Phase Locked Loops(PLL)as the system clock.It is based on the third-generation Double Data Rate 3 Synchronous Dynamic Random Access Memory(DDR3 SDRAM)to process video data and output parallel video signals,and then uses the IT6615 chip for parallel to serial video signal processing,Finally,an 8K ultra high definition color bar test signal is output through the High Definition Multimedia Interface(HDMI).Under the design of this structure,this thesis uses Verilog HDL as the main programming language to generate RGB parallel video signals and other signals.Then,algorithms such as color space conversion module and data compression algorithm are used to generate parallel video signals in YUV 420 format.Then,based on the IT6615 chip,Transition Minimized Differential Signaling(TMDS)encoding and serialization output are performed,Compress the output bit rate to 1/2 of the original 8K through the HDMI interface* 4K@30Hz Ultra high-definition video signal,achieving the transmission of ultra high-definition video signals through low code rate channels.The video signal source designed in this thesis can ultimately achieve 8K through simulation on the VIVADO platform and oscilloscope testing verification* 4K@30Hz Ultra high definition color bar test signal output meets the urgent production testing needs of enterprises.The main work and innovation points are as follows:(1)The video signal source testing function designed in this thesis is relatively comprehensive,supporting ultra high definition TV motherboard testing,and is compatible with high-definition TV motherboard and analog standard definition TV motherboard testing downward.The video signal source control system based on STM32 achieves visual operation and automatic detection of downstream TV motherboards.(2)This thesis designs an 8K parallel video signal generation module based on FPGA.Based on the IT6615 chip DL and DH dual end odd and even field signal input,YUV 420 data compression,and DDR sampling,the pixel clock frequency required for 8K parallel video signal transmission is compressed to 1/8 of the original,which makes the transmission more stable and accurate,and the power consumption is lower.At the same time,the YUV 420 sampling method was used to reduce the transmission rate of ultra-high definition video signals and improve transmission stability.Finally,the high-speed parallel signal is converted into a serial signal through a parallel to serial processing module,effectively solving the problem of insufficient clock speed in FPGA Select IO IP core resources.(3)This thesis designs a data caching module based on DDR3 SDRAM,which caches large amounts of 8K image data using DDR3 SDRAM and First In First Out(FIFO)buffers.