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Studies On Soft Error Problems Of Integrated Circuits

Posted on:2010-01-01Degree:DoctorType:Dissertation
Country:ChinaCandidate:Q DingFull Text:PDF
GTID:1118360308457460Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
As technology node of nano-scale integrated circuits scale down, soft error is becoming a big concern, because of decreasing gate size, reducing supply voltage, increasing circuit scale, and growing circuit frequency. Soft error is a kind of transient error, after which the circuit component is not damaged. Combinational circuit was considered to be less vulnerable than memory circuit. But soft error rate of combinational circuit is expected to increase rapidly and influence deep sub-micron chip significantly.This paper is about the modeling and analysis of soft error and soft error rate reduction method. A C++ programming language based soft error analysis tool is implemented as well.The impact of process variation on soft error is presented in this paper. Worst case analysis shows that critical charge variation caused by gate length variation can be as large as 81.7%. Statistical analysis shows that process variation induced critical charge 3σvariation can be as large as 13.6%. Local variation is found to be much more important than global variation.Our research of combinational circuit soft error is introduced in this paper. We discover the exponential relation between injected charge and pulse width. The exponential relation between critical charge and gate delay is also discovered. Our experiment shows the importance of output node when considering soft error. An output remapping method is proposed to reduce soft error rate in this paper. The soft error rate reduction ranges from 59.2% to 89.8%. This method can be used on critical paths and introduces no delay penalty in most cases.The estimation error of the developed soft error analysis tool ranges from 0.1% to 4.5%. Soft error analysis is performed for an OpenRisc 1200 processor core, and the multiplier of the processor is found to be very important. With the help of the tool, the impact of circuit performance on soft error rate is analyzed. Based on this analysis, the estimation error of high level soft error model is analyzed.
Keywords/Search Tags:Integrated Circuits, Soft Error, Output Remapping, OpenRisc 1200
PDF Full Text Request
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