Processing System Based On Sopc Noise

Today, the society is entering humanistic community. The concerns for human health, rights and other things have increased steadily. In the industrial production and daily life, the noise monitoring is one expression of this.purpose. Noise is harmful to people, animals, instruments and building, so noise monitoring is very important.The subject design is the sub-topic of the textile workshop control system project and mainly achieves the goals of the textile workshop environmental noise detection, alarm and transmission. The paper analyses the noise monitoring function of the textile plant and puts foward to a viable solution to the acquisition, processing and alarm of the noise speech signal.First, the paper describes the basic knowledge of FPGA, Verilog HDL and language encoding algorithm and the current noise sources and control method of the textile workshop, developes and demonstrates the overall program,selects the better compression and quality of ADPCM algorithm and conducts the Verilog HDL program of the process of the coding and transmission and completes the functional simulation of the voice compression module.Second, taking the Cortex-M1 processor as the core, integrating the SRAM, Flash Memory, ADC module, OLED module, UART module and voice compression modules,the subject builds a complete SOPC, and is transplanted with the embedded operating system,μC/OS-Ⅱ,to built an embedded development platform and complete the application development. the design achieves real-time monitoring of textile shop noise, it can realize the real-time measurement of the noise sound level of the current environment and display the operational status. When the nosie exceeds the cordon,the device takes a rapid alarm response.The design achieves the design requirements of the subject.The subjects uses an improved ADPCM algorithm, not only improves the speed but also reduces the occupied FPGA resources and the cost. At the same time, the design uses the ACTEL's new Fusion FPGA, integrating multi-chip systerm into single-chip, so it reduces the design costs and shortes the development cycle。The design not only makes the performance and price ratio optimization, but also has good expanding and wide application value and development prospect.