Based On Sopc Scalable Gps Receiver And Design,

Since the birth of GPS, it has attracted many users all over the worldby it's characteristics, such as high precision, available all day whateverthe weather is, can cover the whole world, convenient, low cost and goodquality. But all the GPS chips and OEM receiver bords of our countrydepend on importation, not to mention high quality whole machine andsystem. Along with GPS application becomes more and more popular, it ismore and more important to develop low cost GPS receiver, which hashigh performance and intellectual property. Because of the goodextendability of FPGA, we can add other function such as GIS and RS onthe GPS receiver designed based on SOPC. And also, it can integrateother functions such as real-time communication, telecontrol, multimediaand communication through net, etc, to satisfy different user's demand.Besides, the GPS receiver based on SOPC can offer a good experimenttable for scientists to study new algorithms and different navigationsystem. In a word, to study the method of designing GPS receiver basedon SOPC is of great importance and significance.In GPS receiver, if we want to get the GPS navigation data, we mustsynchronize the incoming signal and local signal. Then demodulate theGPS signal. This is a very complex signal processing procedure.Ingeneral, GPS receiver has three parts: RF front-end, IF signal processing(receiver channels) and position calculations. This thesis mainly dealswith the IF signal processing. First, model the GPS IF signal based on thetheroy of GPS signal generation.Then study the algorithms of IF signalprocessing based on the IF signal model. An algorithm based on FFT isintroduced and simulated by MATLAB. And the simulation andrealization of the algorithm based on FFT in Field Programmable GatesArray (FPGA) is introduced in detail. To the whole receiver, a designmethod based on SOPC is introduced, that is embeding the Micro-processor in FPGA to realize position calculation. So we can make a GPSreceiver only by a FPGA and a RF chip, thus can reduce the cubage andcost. From the outcome of the experiment, we can find it is available torealize a GPS receiver on a FPGA chip, and the time of GPS signalacquition reduces form 42.96 seconds to 21ms. And the navigationexperiment proves that it is capable to do the navigation and orientationoperation by embeding Micro Processor in FPGA. So it is a good methodto realize GPS receiver based on SOPC.