Design And Implementation Of Matrix2 Configurable Scalar Data Memory

Matrix2 is a high performance DSP core used for HPC and embedded applications. This microprocessor has an independenently designed instruction set architecture. It adopts a scalar&vector parallelization micro-structure and VLIW technology to develop a denser ILP and DLP. So the processor can provide a high peak computing performance. How to design a flexible and satiable on-chip memory system becomes an intractable challenge in Matrix2 project.Basing on the micro-architecture and application demands of Matrix2, this paper designs and implements a configurable on-chip scalar data memory(SM). Here are the main contents:1. According to the micro-architecture and function of Matrix2, SM design a scalar data accessing instruction set which support linear/circular addressing mode and multi-granularity data accessing.2. In order to fulfil the applications, this project advances an overall structure of configurable scalar data memory. This structure supports programmable Cache or SRAM memory modes and Cacheable or Un-Cacheable accessing modes.3. According to the configuration of L1 D Cache, SM devises an accessing controller of L1 D Cache. It supports a soft programmable strategy to maintain the cache coherence.4. According to the configuration of SRAM, the scalar memory can be organized by the interleaved address, so that L1 D Cache and SRAM use the same memory banks. This memory supports Load/Store requests and DMA requests parallel execution which help to reduce the conflict.5. This paper designs shared controller(SMC) of scalar accessing pipeline for SM. SMC implements instruction decoding, address computing, accessing memory and data writing back.Finally, in the module-level and system-level verification environment for SM, this paper provides a hierarchical verification. The coverage reaches 100%, the function of SM is correct. Under the 40 nm technics of a certain manufacturer, this paper implements the logic synthesis and optimization, and the result can satisfy the design requirement.