A Method Of FPGA Hardware Vulnerability Analysis Based On Error Propagation Model

The possibility of FPGA failure caused by outside interference and the system itself is increasing with the continuous improvement of the complexity of FPGA circuits.These errors are propagated step by step through the logic functions of the FPGA circuit,which in turn causes the failure of the FPGA system and may even cause the entire system to crash.Therefore,it is of very important practical significance to accurately evaluate the vulnerability of the FPGA hardware system in the event of errors,so as to implement troubleshooting and system protection of the FPGA system.The main works of this thesis includes:1?The vulnerability theory of FPGA is systematically introduced,and the common vulnerability assessment direction and vulnerability assessment method of FPGA are given.2?Different types of errors that may exist in the FPGA are classified.At the same time,the propagation characteristics of the errors in the FPGA netlist circuit are summarized,including the shielding effect of the error propagation in the FPGA netlist circuit and the corresponding solution to different error masking effects.3?For FPGA hardware Trojan insertion,an analysis and calculation model of FPGA netlist node turnover rate is given.Since the correlation between signals is taken into account in this model,the signal probability and signal turnover rate of each node of the FPGA netlist circuit can be accurately calculated using this model.And these nodes can be used for hardware Trojan insertion by determining the node information with the lowest signal turnover rate.It can futher explore the vulnerability of the FPGA exposed in the hardware Trojan,and conduct relevant research and analysis.4 ? Based on the error propagation characteristics in FPGA,an FPGA error propagation analysis model was established.Multiple error masking effects are considered in this model,so the probability of error propagation in the netlist circuit can be accurately calculated.At the same time,the algorithm design of the model was studied and simulated.According to the established error propagation model,the thesis set up different FPGA vulnerability assessment programs,and analyzed the vulnerability of FPGA from different perspectives based on simulation results.The analysis model established in this thesis is applicable to combinational circuits and sequential circuits.Since signal correlation and various error masking effects are taken into consideration,the accuracy of these analysis models is relatively high.In addition,the analysis method of the thesis is applicable to many types of error models,and has the advantages of low time cost and wide applicability.