High Efficiency Multilevel Converter For Power Quality Applications

This dissertation is the result of the research and development of a power conditioning system for supercapacitor energy storage systems (SCES). The dominant challenge of this research was to develop the dc/ac converter module of the power conditioning system that can match the dc voltages and dc currents on the supercapacitor side with the ac voltages and ac currents on the utility side.The focus of this dissertation is a three-level diode-clamped dc/ac converter, which is a fundamental part of the power conditioning system. Accordingly, this dissertation deals with the space vector modulation (SVM) of three-level converters and presents a computationally very efficient three-level SVM algorithm that is experimentally verified.Furthermore, the proposed SVM algorithm is successfully generalized to allow equally efficient, real-time implementation of SVM to dc/ac converters with virtually any number of levels. The most important advantage of the proposed concept is that the number of instructions required to implement the algorithm is almost independent from the number of levels in a multilevel converter. A practical implementation of this algorithm on a DSP+FPGA combination is describedMore on the side of the control of multilevel converters, particular attention in this dissertation is paid to the problem of charge balance in the split dc-link capacitors of three-level neutral-point-clamped converters. It is a known fact that although the charge balance in the neutral point (NP) can be maintained on a line cycles level, significant third harmonic current flows into the NP for certain loading conditions, causing the neutral-point voltage ripple. The logical consequence of that ripple is the deteriorated quality of the output voltage waveforms as well as the increased voltage stress on the switching devices.This was the motivation to more carefully explore the loading conditions that cause the imbalance, as well as to study the fundamental limitations of dc-link capacitor charge balancing algorithms. As part of this work, a new model of the neutral-point current in the rotating coordinate frame is developed as a tool for the investigation of theoretical limitations and in order to provide some insight into the problem. Additionally, the low-frequency ripple is quantified.The diode clamped three-level topology inverter is analyzed to reveal the operation principle and evaluate the efficiency. The results shows efficiency improvement if this are compared with those obtained from its two-level counterpart.Finally, the theoretical studies are verified by computer simulation and waveforms obtained from an experimental setup rated for a power of 15 kW, 5 kHz switching frequency.