| △∑ADC, a high-precision analog-to-digital converter structure, is currently widely used in modern portable electronic products. These products develop rapidly in recent years, and their performance and functions are greatly improved. For this case, it is very necessary to carry out research on low voltage low power△∑ADC in order to meet the growing demands for battery operational life and ensure the reliability of products. It is also considered as a hot topic of concern in both academia and industry.Usually,△∑ADC contains analog modulator and digital decimation filter. This dissertation focuses on high-performance optimization techniques for high-precision△∑modulators in different applications.1. Considering the requirements of portable measurement devices, high-precision, low voltage low power techniques for high-order single-bit and multi-bit modulators are discussed respectively. To meet the requirements of low voltage low power, a single-loop fully differential feed-forward structure is proposed in single-bit modulator design, and other optimization techniques are shown below:(1) comprehensive, accurate system models and analysis methods are developed to select optimal system architecture; (2) a new low voltage low power operational transconductance amplifier (OTA) with high performance common mode feedback (CMFB) circuit is introduced to reduce core power consumption; (3) a power and area optimized resonator circuit is adopted to improve in-band quantization noise power.Based on the former research, performance optimization on multi-bit structure is also introduced, and its innovative techniques are given:(1) multi-bit switched-opamp (MBSO) techqnque is first used to achieve a good trade-off between high precision and low power design; (2) a novel high power-efficiency SO is proposed; (3) a new ultra-low power, miniaturized resonator structure applicable to SO technique is developed to save 75% power and 70% area cost compared with the traditional structure.Both modulators are implemented in 0.35μm CMOS, and their bandwidth is 1KHz. Measurement results show single-bit modulator achieves 95dB dynamic range (DR) and consumes 20μW under a 1.5V supply; for multi-bit modulator under a 1.8V supply, its DR is 88dB and the total power is only 9μW.2. To accurately record full-spectrum weak biomedical signals and meet the demands of implantable electronic systems, ultra-low power, miniaturization techniques for high precision implantable modulator is also described. This implantable modulator is optimized according to the shortcomings of previous MBSO one. its improvements are follow:(1) system coefficients and operating time of key modules are re-optimized to guarantee the stability; (2) one technique based on high density MOSCAP is employed to realize the target of miniaturization; (3) one new bias technique is developed to further optimize the power consumption of SO; (4) an innovative miniaturized ultra-low power quantizer structure with MOSCAP-string is proposed. Testing results verify that the designed implantable modulator in 0.18μm CMOS can obtain 85dB signal-to-noise and distortion ratio (SNDR) over a 10KHz bandwidth, but it power is only 13μW under a 1.OV supply.3. Low distortion, ultra-low power techniques for high-precision audio modulators are introduced to ensure the fidelity of electronic products and overcome the problem of high power. Compared with implantable MBSO modulator design, one two-step summation technique is adopted in the feed-forward part to further reduce power consumption. In addition, one novel low-distortion dual-cycle shift (DCS) data-weighted averaging (DWA) technique is used to suppress harmonic distortions caused by capacitance mismatch of feedback digital-to-analog converter (DAC). Another miniaturized ultra-low power quantizer structure with half comparator number reduction is given in this design. Finally, the measured SNDR of the designed modulator implemented in 0.18μm CMOS is 92dB, and the total power under a 0.9V supply is 58μW.
|
PDF Full Text Request