Key Technology Research On Analog Front End Integrated Circuit And System For Imaging LADAR Receiver

Imaging LAser Detection and Ranging?LADAR?,which typically consists of a transmitter system,a receiver system and a signal processing system,is widely used in the fields of civil,military,aviation and aerospace,including unmanned aerial vehicle?UAV?,terrain mapping,robots and automobile auxiliary driving,precision guidance and rocket landing.The receiver system,which affects the performance of the whole LADAR system,is one of the key modules of imaging LADAR.The analog front end?AFE?circuit of the receiver is mainly utilized to process the current signal from the photodetector.Its performances directly determine the quality of the echo signal acquisition,the accuracy of the echo signal timing discrimination,and the ability to suppress the interference.AFE circuit of the traditional LADAR receiver was commonly designed and implemented adopting discrete devices and components,resulting to high power consumption,bulky circuit size,more noise of the circuit.AFE integrated circuit of imaging LADAR receiver is a key device,which restricts the smart and compact imaging LADAR,consequently,its research has great significance and value.Firstly,the thesis summarizes the rangefinder principle of LADAR,and introduces the system architecture and AFE circuit of pulsed TOF imaging LADAR receiver.And then,in view of the characteristics of large dynamic range?DR?,narrow pulse width and weak amplitude of the pulsed laser echo signal,the thesis presents two single-channel AFE circuits for imaging LADAR receiver.Lastly,a linear-array receiver AFE circuit is proposed for vehicle application.This thesis presents a linear DR receiver channel with adaptive gain control scheme,which is designed and implemented in a 0.18?m CMOS technology for pulsed TOF imaging LADAR application.The receiver can achieve a linear DR of 66 dB due to adopting adaptive gain control scheme,and a low walk error timing discrimination of 1.01ns by means of differential voltage shift.The measured results have confirmed the performances of the proposed receiver with a linear transimpedance gain of 106 dB?,an equivalent input-referred noise current spectral density less than 4.55 pA/Hz^0.5,and a minimum detectable signal?MDS?of about 0.28?Arms at SNR=5,which satisfy the design goals for pulsed TOF imaging LADAR application.This thesis also presents an AFE circuit for pulsed time-of-fight 4-D imaging LADAR receiver,which mainly consists of a transimpedance amplifier?TIA?with wide dynamic range and a timing discriminator with double threshold voltages.The preamplifier of the proposed TIA adopts shunt-feedback topology to amplify weak echo signal and current-mirror topology to amplify strong one,respectively.The proposed AFE circuit can directly capture the pulsed echo amplitude with wide dynamic range through the programmable gain control switches.And the proposed AFE circuit,which achieves a high gain of 106 dB?,a linear dynamic range of 80 dB,an averaged input-referred noise current spectral density of 0.89 pA/Hz^0.5 and a minimum detectable signal of 0.36?A at SNR=5,and a sensitivity of 8 nW with APD of 45 A/W,was designed with 3.3 V devices and fabricated in a 0.18-?m standard CMOS technology.The total die area of AFE chip,which includes the circuit core,bandgap and bias circuits,and I/O PAD,is approximately equal to 1.20×1.13 mm².This thesis also presents a novel AFE circuit system architecture of the linear-array receiver for the vehicle application,which mainly consists of a transimpedance amplifier array with16 channels,a narrow pulse peak detect and hold circuit with 16 channels and a front-end correction circuit of APD reversed bias voltage.The transimpedance preamplifier adopting Cherry-Hooper circuit topology is utilized to improve the bandwidth for detecting the nanosecond pulse echo signal,and the function of the high accuracy peak detect and hold circuit is to widen the pulsed width of the pulse signal.As a result,the digital quantization of the analog output voltage can be realized by using one off-chip ADC.In addition,this thesis proposes a novel front-end correction scheme by adjusting APD reversed bias voltages independently,which can eliminate the echo intensity signal detection error caused by the responsibility mismatch of the array receiver.In proposed AFE circuit,some key circuits were fabricated in 0.18?m standard CMOS technology.The measured and simulated results showed that the single channel transimpedance amplifier achieved a gain of 100.1dB?,a bandwidth of 400MHz and an input referred noise current spectral density less than 2 pA/Hz^0.5,and the peak detect and hold circuit had a minimum overshoot voltage error of 2% in the worst case condition.