Statistical performance modeling of modern out-of-order processors using Monte Carlo methods

Simulation is an indispensable tool used by computer architects for processor performance research and design. Due to the numerous problems of current performance simulation methods, there exits a pressing need for new modeling techniques that can improve simulation speeds while maintaining accuracy and robustness. It is no longer practical to use only cycle-accurate processor simulation (the predominant simulation method) for design space and performance studies due to its extremely slow speed that is exacerbated by the increasing complexity of today's processors. As a result, designing and researching future processors can be hindered. This work presents an extension to the Monte Carlo processor performance (MCPP) modeling technique that enables the creation of fast, accurate, and robust statistical models of modern out-of-order processors. Using this new method, we show that our MCPP models can achieve highly accurate performance predictions within 7% of measurements and achieve speed-ups of tens of thousands of times over cycle-accurate simulation. As a result, such models can be faithfully used for quick processor performance evaluation studies, bottleneck analysis, and design space exploration. We have successfully validated the new MCPP modeling technique using two models: one for the modern AVID Magny-Cours processor and one for the popular PTLsim cycle-accurate simulator.