| There has been a growing interest in low-voltage analog-to-digital converters (ADC) in recent years. This trend stems in part from the decrease in allowed supply voltage as a result of technology scaling. Systems that require low-voltage operation such as biomedical and wireless sensor applications also motivate research in this area. Op-amp-based circuits become less desirable as the supply voltage falls because achieving high op-amp gain with a low supply is difficult. Comparator-based switched-capacitor circuits were previously introduced and replaced an op amp with a comparator and current sources. However, the internal swings in these circuits are limited by the headroom necessary to operate the current source transistors in saturation.;This dissertation presents a work that replaces the op amp with a comparator and switched capacitors to avoid the swing limitations from current sources. The proposed technique not only allows the circuits to operate with a power supply approaching the transistor threshold voltage, but also allows signal swings to extend beyond the power supply. A low-supply-voltage algorithmic ADC with greater than rail-to-rail input range was implemented in standard 0.25 mum CMOS technology to demonstrate the idea. At 0.55-V supply, which is near the n-channel threshold, the ADC achieves an ENOB of 8.4 bits with a 1.4-VPP differential input range. The prototype occupies 0.65 mm2 and consumes 0.79 muW of power at a 5-kHz sampling frequency. |
