Reliability characterizations and failure mechanism of ultra-thin oxides for MOS devices

The aggressive scaling of smaller/faster logic and memory devices demands accurate reliability characterization and knowledge of the failure mechanisms of ultra-thin (<30 Å) silicon dioxide (SiO ₂) layers in the gates of metal-oxide semiconductor (MOS) structures. The increased occurrence of soft breakdown in ultra-thin oxide films necessitates the development of more sophisticated techniques to detect breakdown. One such technique is by interrupting stress and monitoring stress-induced leakage current (SILC) or interface state density (D_it). The effect of interrupting stress was carefully studied and determined not to affect device lifetime. A comprehensive time-dependent dielectric breakdown (TDDB) study was conducted on ultra-thin oxide over a temperature ranging from 220°C to 350°C to study temperature acceleration. The results of the study showed that both hard and soft breakdown modes exhibit the same temperature dependence.; The choice of a failure model for time/charge to breakdown (t_BD /Q_BD) is critical for accurate reliability extrapolation. In this work, two more experiments were carried out to clarify the current physical mechanisms responsible to dielectric wear-out. The first experiment investigated the effects of pulsed biased stress on device lifetime. A lifetime enhancement under bipolar pulse stress was observed. The results suggest that previously proposed mechanism of hole de-trapping in thick oxide may not be responsible for the lifetime increase observed here for ultra-thin oxides. The second experiment studied the effects of heavy ion on the reliability of ultra-thin SiO₂. Annealing and electron injection experiments on irradiated devices with heavy ion implied that holes were significantly created and trapped inside SiO₂ without causing the SiO₂ to breakdown. The results from these two studies suggest that breakdown of ultra-thin oxides is not caused by holes and that the anode hole injection (AHI) model for constant voltage stress (CVS) is unwarranted in the ultra-thin regime.