Current efficient, low-voltage, low drop-out regulator

Low drop-out regulators are an essential part of most power supply systems. In particular, the increasing demand for portable battery operated products has driven power supply design towards low voltage and low quiescent current flow, i.e., cellular phones, pagers, camera recorders, laptops, etc. The thrust is towards reducing the number of battery cells, required to decrease cost and size, while minimizing quiescent current flow to increase battery life. Current efficiency is particularly important because at low load-current conditions the life of the battery is adversely affected by low current efficiency, in other words, high quiescent current flow. This research develops techniques that enable practical circuit realizations of law drop-out regulators at low input voltages and low quiescent current flow without sacrificing performance.;An intimate knowledge of the system reveals that the frequency stability requirements are dependent on load-current. As a result, a load dependent biasing buffer is designed to minimize current flow during low load-current conditions and aid during transient load-current steps. Another problem with low voltage in a CMOS environment is reduced gate drive for the power transistor. In other words, the output current capability per unit area of silicon is appreciably less for lower voltage conditions. However, gate drive can be effectively increased by reducing the threshold voltage of the power PMOS device. This is done by forward biasing the source to bulk junction and thus exploiting the bulk effect phenomenon. Yet another problem with low voltage is the realization of an accurate reference voltage. A circuit topology suitable for low voltages and curvature compensation is therefore developed.;The overall system is designed, simulated, and experimentally evaluated. The process technology utilized is MOSIS 2 $mu$m CMOS with a p-base layer. However, most of the techniques can be adapted to almost any technology ranging from bipolar and vanilla CMOS to biCMOS processes. As a result, the system can be designed and optimized for low cost. The findings show that a successful low voltage design is achieved by implementing the techniques developed. These techniques are also appropriate for maximizing performance of linear regulators outside the realm of low voltage.