Research On Negative Low Drop-Out Voltage Regulators

The widespread use of battery-powered devices in today's world has increased the demand for low-voltage, low-dropout linear regulators (LDOs). The basic function of an LDO isto provide a reliable, constant output voltage to drive small sub-circuits, while extending battery-life in portable applications and yet be cheap enough to be feasible for mass produced consumer electronics. Despite their low cost, LDOs provide clean, regulated voltages to various loads while offering protection and filtering from electrical transients and noise. These characteristics make LDOs the preferred power management solution for applications where a low dropout voltage and low output current are required. Some of the most common loads driven by LDOs include microcontrollers, memory chips, and low voltage logic circuits and drivers in cost sensitive applications such as mobile phones, digital cameras, MP3 players and other battery powered electronic devices. At present, many aboard companies still mostly occupy the market of power management IC. It has important significance to research and development of domestic power management IC. And it has much great importance to require such a big market. Therefore, it is of great importance to study the LDO linear regulator circuit.The object of this paper is to rsearch and design a negative low dropout voltage linear regulator. Using high-order curvature compensation technique, design optimization is done for its voltage reference with bandgap structure, which enhances the temperature characteristic of the voltage reference, so the temperature characteristic of the LDO. The LDO is fabricated in 6μm high voltage BIPIC process.The output voltage is adjustable from -2V to -25V, typical quiescent current is 2mA, and the dropout voltage is only 0.7V at 1A load. In addition, the thermal shutdown and over current protection are also designed, which guarantee the electric circuit working in safe operation area(SOA). At the same time, it has an enable control input pin compatible with TTL and CMOS for remote shutdown capability. This circuit is primarily used to power supply of the post switcher regulator and battery operated equipment.During circuit designing, the basic theory of LDO linear voltage regulator is givern first. Then the total architecture of negative LDO is designed based on its function requirement. Later, the sub-block circuits are analyzed in details. Afer that, the sub-block circuits are designed and simulated with Cadence software, also the reasonable electric circuit data is given. At the last, layout design and verification are done. The results of chip test indicate that this LDO has achieved its function and specifications object.