| In this work, design of capacitive accelerometers with CMOS electronics is investigated. The goal of this investigation is to form accurate behavioral models at three different levels of abstraction: system, electrical, and mechanical. Analysis of these models permits a deeper understanding of both accelerometer design and design trade-offs. The results of this work are used to obtain an accurate prediction of accelerometer performance.; At the system level, simultaneous force-balancing and analog-to-digital conversion of the analog input acceleration to digital output is achieved using a sigma-delta force-feedback loop. Analysis of the feedback loop shows that the system is unstable without compensation. Compensation of the feedback loop is accomplished with a forward path, discrete-time lead filter. Modeling and simulations are used to determine optimal compensator characteristics and system robustness.; Design of CMOS-compatible interface electronics is also investigated. Time-multiplexing of the sigma-delta feedback loop enables errors introduced by the electronic interface to be measured and canceled. A method of interfacing the sense-element to a fully-differential electrical interface is described. To obtain accurate predictions of resolution, a detailed noise analysis is presented. Fabricated devices invariable exhibit an acceleration offset due to mismatches from the manufacturing process. A technique for trimming this offset after packaging is demonstrated.; Mechanical design of the sense-element is found to play a fundamental role in the determination of both dynamic range and noise floor. Understanding of factors determining mechanical sensitivity, noise, and robustness is obtained through detailed analyses.; Efficacy of both the design techniques and the analytical models developed through this research has been experimentally verified. The experimental test-bed used for verification is a monolithic three-axis surface micromachined accelerometer. The 0.2 micro-gram proof-mass is formed from a 2.3 micron-thick layer of polysilicon. A measured dynamic range of 84 dB, 81 dB and 70 dB is achieved in the x-, y-, and z-axes respectively. While the 4mm x 4mm chip operates from a 5 Volt power supply, the proposed design techniques are applicable to low voltage technologies. Comparisons of calculated, simulated, and measured parameters show excellent agreement between modeled and observed behaviors. |
