Key Technology Research On Silicon-Based Radio Frequency Integrated Circuits For Miniaturization Of Electro-Reconnaissance System

Nowadays and in the future,the technological development of systemization,informatization and intelligence has been an overwhelming trend in the modern battlefield of all-domain integrated operations,and the electromagnetic spectrum dominance is increasingly critical.The technology of electromagnetic spectrum warfare is developing in the direction of high precision,high maneuverability,real-time intelligence,multi-source fusion and equipment miniaturization.How to ensure and enhance the electromagnetic spectrum warfare capability of the equipment under the limitation of platform space and payload weight has become an urgent issue.As the importance and imperative of equipment’s miniaturization,integration and low costing grows,research on the chip design for electromagnetic spectrum warfare,such as broadband RF(radio frequency)chips and processing chips,et al.have become research hotspots at present time.This thesis focuses on the key technology of radio frequency circuit and chip design in the electronic reconnaissance system,including the chip realization of RF circuits and modules,as well as the miniaturization of the radio frequency receiver for electronic reconnaissance.The main contributions of this thesis are as follows:(1)The system architecture of the electronic reconnaissance receiver,as well as the index definition and design method of wideband microwave receiver are described.The index decomposition principle of the RF channel based on millimeter wave secondary conversion scheme is analyzed in detail.A miniaturized multi-channel 2-18 GHz electronic reconnaissance receiver under the fund of innovation project of Nanjing Electronic Equipment Research Institute is developed,2.5D silicon-based MEMS switching filter banks are used in the receiver and achieve a large reduction in volume.The design method and test result of the miniaturized multi-channel 2-18GHz electronic reconnaissance receiver module is given which meantime illustrates the application background of the studied chip circuits in the thesis as a project example.(2)The design of silicon-substrate wideband low noise amplifier(LNA),a key component in electronic reconnaissance receiver,is studied.Typical circuit structures and design methods of broadband LNA are summarized and analyzed.In order to expand the operation bandwidth while reducing the LNA’s chip area,an inductor-less noise cancelling gm-boosting balun LNA is proposed,with its circuit design principle studied,noise coefficient deduced and noise optimization method analyzed.The proposed LNA is designed and fabricated in a standard0.18-μm CMOS technology.Measurement results have shown that it has achieved a good performance over the whole operation frequency range of interest(100MHz to 6GHz)with a gain of 15dB,minimum noise figure(NF)of 3.0dB and the die area of 0.04 mm~2.Moreover,a two-stage cascaded structure of common source and common gate LNA circuit with T-coil series and parallel peak-inductor is proposed in this thesis,which can reduce the chip area and at the same time expand the working bandwidth of LNA.The chip is fabricated in 0.13-μm SOI-CMOS process and occupies a die area of 0.48 mm~2.Measurement results have shown that the voltage gain of LNA chip is 25dB in the frequency range of 8-12GHz,and it shows a good performance of which the minimum NF is 1.8dB.(3)The architecture and the design of the amplitude-phase controlling circuit,which is a key circuit in the T/R module of the next generation phased array electronic reconnaissance system,is analyzed and studied.Aiming at the requirements of T/R module for low insertion loss and high power of the switching circuit,a swing equalization technology for stacked RF switches is proposed.The RF switch circuit is fabricated in 0.13-μm SOI-CMOS process and have a good performance of the insertion loss less than 0.5dB,the isolation more than 40dB,and the power handling capability more than 37dBm.Aiming to a good performance of broadband matching and high phase shifting accuracy of the digital phase shifter,a bridge-T phase-shift unit circuit with a double-metal-layer inductance and a cascade configuration optimization evaluation method of the 6-bit phase shifter are put forward.The 6-bit phase shifter circuit is fabricated in 0.13-μm SOI-CMOS process and have a good performance of the phase shift error less than 4°in the frequency range of 8-12GHz.According to the requirement of T/R module for low additional phase shift of the digital attenuator circuit.a calibrated low phase shift 6-bit attenuator circuit is proposed.π-type and bridge T-type attenuator units are designed to achieve better performance of low additional phase shift.The 6-bit attenuator circuit is fabricated in 0.13-μm SOI-CMOS process and have a good performance of the insertion loss(reference state)less than 6dB,and the additional phase shift less than 6°.Based on the above designed functional circuit,an X-band amplitude-phase controlling circuit chip in common-leg architecture is designed and fabricated in 0.13-μm SOI-CMOS process.In this thesis,the chain budget is analyzed,and the system integration is completed.Furthermore,an X-band dual-channel T/R module is designed by interconnecting two amplitude-phase controlling chips and two external power amplifier chips in wire-bonding process.The module measurement results have shown that the gain of the receiving chain in 8-12GHz is more than 33dB,the noise figure is less than 3.3dB,the RMS of the phase shifting error of the receive chain is less than 8°,the max error of attenuation of the receive chain is less than 2dB;the small signal gain of the transmit chain is greater than 20dB,the saturated output power of the transmit chain is greater than 25dBm,the RMS of the phase shifting error of the transmit chain is less than 7°,and the max error of attenuation of the transmit chain is less than 2dB.