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Research And Design Of CMOS Millimeter-wave Phased Array Radar Chips

Posted on:2024-02-26Degree:DoctorType:Dissertation
Country:ChinaCandidate:Z L SongFull Text:PDF
GTID:1528307301976609Subject:Circuits and Systems
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In recent years,with the rapid development of wireless communication technology,the application of radio frequency and millimeter wave bands has been widely attended.Its huge market potential drives more products and applications are designed at this band.The silicon-based process has the advantages of high integration and low cost which can conform to the trend of RF millimeter wave integrated circuits miniaturization and high integration.With the development of CMOS technology,the demands of the radio frequency and millimeter wave integrated circuits design is increasing.Based on the technique of RF millimeter wave circuit modeling and RF millimeter wave frequency modulation circuit(frequency multiplier),the technique of improve the performance of silicon-based RF millimeter wave transceiver front-end is carried out an in-depth study in this paper.The main research contents are divided into four parts:1.Research on RF millimeter wave passive devices modeling technique.Testing pad(GSG-PAD)is a conventional structure when design RF millimeter wave integrated circuits.However,with the increase of frequency,the coupling effect between input and output GSG-PADs increases the influence on signal transmission,resulting in this part of the coupling effect cannot be ignored.Based on the existing single-port GSG-PAD model,the equivalent circuit model of two-port GSG-PADs is established in this paper.Then,the electromagnetic analysis of different GSG-PADs connection methods is carried out,the signal radiation characteristics of different common ground methods between input and output are evaluated,and the two-port GSG-PADs models of three structures are established.From 1 MHz to 67 GHz,the root-mean-square error(RMSE)of the magnitude of return loss S11and that of insertion loss S21are less than 0.013 and0.003 respectively.Finally,establish the complete model of the DUT and test pads to further verify the accuracy of the proposed two-port GSG-PADs model.The root-mean-square error of S-parameters measurements are less than 0.02 in the range of1MHz-67GHz.2.Research on RF millimeter wave frequency modulation technique.Frequency multiplier is an important module of the RF millimeter wave frequency modulation technique.In this paper,a millimeter wave×8 frequency multiplier is designed based on the structure of FET frequency multiplier.multi-order resonance matching circuit based on the transformer and the special design of the inter-stage matching circuit between×8 cell and the output buffer,the proposed frequency multiplier realizes a wide bandwidth.The proposed×8 frequency multiplier is fabricated in the 65nm CMOS process.The relative 3-d B bandwidth of the output power is over 25%,which is from74.8 GHz to 96.2 GHz.The measurement is 4.63 d Bm at 84 GHz with an input power of-2 d Bm,while the power consumption of the whole chip is 125 m W with the 0.7mm2dimension,and PAE is 1.8%.3.Research on Rf millimeter wave FMCW chip.FMCW technique is commonly used in the transceiver of radar system.It has the advantages of significantly reducing transmitter power consumption,signal processing complexity and cost.In this paper,by improving the traditional FMCW radar transceiver architecture and improving the performance of main module to optimize the performance of CMOS FMCW radar transmitter’s output power and receiver’s noise.The proposed FMCW radar chip is manufactured by a commercial 65-nm CMOS process.The 17 d Bm output power and6.25 d B noise figure can be achieved at 94GHz operating frequency.Due to the integration of 6 bit phase shifter,the transceiver also has phase modulation function.4.Research on RF millimeter wave FMCW phased array radar chip.This paper aims to optimize the performance of CMOS FMCW radar transceiver’s output power and noise by using phased array technique.Some advanced technique are adopted to improve the performance of transceiver’s main module.Finally,the proposed FMCW phased array radar chip was verified by using a 65nm CMOS process.The output power of a single channel transmit is 16 d Bm and the receiver’s noise figure is 8.8 d B at 94GHz.Due to the integration of 6 bit phase shifter and 3 bit attenuator,the chip has the beam-forming ability.It can be used for W-band phased array vehicle-mounted radar systems and other military applications.
Keywords/Search Tags:CMOS, RF and Mm-wave, RF Circuit Modeling, Frequency Multiplier, FMCW Radar, Phased Array System
PDF Full Text Request
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