Research & Implementation Of SHARC Based PCI Bus Parallel Signal Processor

Sonar signal processing remains the most complicated branch in the field ofsignal due to such reason as the comPlexity of underwater acoustic channels. Themost important characteristic of the development of sonar technology is using thetechnology of digita1 signal proccssing widely. But the processing rate doesn'tmeet the need of practical applications. Because the parallcl processing remainsthe latent capacity of raising the processing rate and solving the mass problem,parallel signal processing became an important characteristic of the modern digitalsignal processing. So the egress of digital processing systern lies in the parallelarchitecture.In this paPer, a signal processing system based on PCl bus is designed andcompleted, Which is made up of fOur chips of ADSP21060 (SHARC) which themost advanced parallel DSP device. Becausc of using the advanced DSP, popu1arhigh speed PCI bus and laxge scale FPGA, using VHDL hardware descriptivelanguage to design the interface logic, the level of designed hardware is to acertain degree. This parallel processing system can be easily expanded to morecomplicated architecture to adaPt to the various parallel algorithIns.In this paPer, the main works are as fOl1owsf 1.A para1lel signal processingsystem with fOur ADSP2l060 processors has been developed. 2. By using FPGAand the VHDL hardwa-re descriptive language, the interface logic between theADD-ON bus of S5933 and the Host interface of SIlARC is designed andrealized.3. The driver of the PCI bus device is compiled. 4. The data reading,writing and BootLoad through the SHARC's Host interface have been debugged.