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The Design Of IRIG-B Decoder Using In GPS Time Setting System And The Application Of VMEbus In Equipments

Posted on:2006-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:J B HuoFull Text:PDF
GTID:2132360152982949Subject:Power system and its automation
Abstract/Summary:PDF Full Text Request
With the development of automatic technology of power system, the requirement about unitive time is more and more accurate. After comparing traditional time setting system and that of GPS, the system using IRIG-B code is an cheap and accurate project to set time. In this system, only one GPS receiver is been used, and IRIG-B code is transmitted by RS422/485. After decoding the IRIG-B code, decoder can set time to equipments. The design of IRIG-B decoder is completed in this paper, using FPGA, Altera corporation. And at the end , an PCB test board is made to test the decoder's function. This paper introduces communication mechanisiTK design of interface and the superior performance , and discusses its feasibility using in equipments of power system.
Keywords/Search Tags:GPS time setting, IRIG-B time code, decoder, VME bus
PDF Full Text Request
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