Design And IC Implementation Of Multi-Modes, High Efficiency DC-DC Converter

With the more functions and the better performance of the consumed electronic productions, the request to the voltage converter become higher, which is the higher efficiency, smaller cubage, lower output voltage, more stability. Compared to the other voltage converter techniques, the switching voltage converter technique fits the requirement better.This thesis analyzes and compares the advantage and disadvantage of DC-DC converters and controlling method, then chooses the Buck circuit and the voltage mode PWM controlling mode, in order to improve the precision and dynamic performance of the output voltage. At the same time, assisted by the PFM controlling method when the load current is small, this mixed controlling method meets the requirement of the high efficiency of the chip in light load current. This circuit works in the PWM mode when the load current is high and the inductance current is continuous, and works in the PFM mode when the load current is light or the inductance current is discontinuous, which achieves high converter efficiency in a wide load current range ,with the input voltage in a range of 2.5v to 5.5v and the output voltage in range of 0.7v to Vin.In this project, we choose the synchronous commutated technique, which reduces the loss of commutate, increasing the efficiency of the converter chip; A new method of feed-forward circuit was used, which makes the line regulation performance better and the dynamic responsibility more quickly; Also, we choose the appropriate component off chip, to meet the requirement of low power loss of the chip, according the design aim; A digital soft-start circuit is designed, that avoids the phenomenon of surge in the process start. The Bandgap and BIAS with high PSRR and low temperature coefficient make the performance of other module better; Then, a excellent compensation circuit is designed, it solves the puzzle of stability in voltage PWM controlling mode.The chip was implemented using CSMC 0.5μm CMOS mixed-signal process. Simulation and testing results indicate that the converter operates in PWM/PFM modes and performs seamless switching between them, displaying good load/line regulation. The output voltage error is less than±2%, the maximum quiescent current less than 17μA and the maximum of efficiency up to 95.6%.