Design Of A BCM Power Factor Correction Circuit

PFC which is a valid method to improve the power factor of electronic products, reduce electrical pollution and low harmonic interference, so how to improve the power factor of SMPS has become one of the focuses for the present design applications. Nowadays the PFC technology for large power application has been gone mature, but the research of PFC technology for small power application didn't get enough attention until recent years. So this paper emphasized the design of low cost PFC chip to suit the growing prevalence of small power equipments.By introducing the control strategy of boost topology PFC system, and analyzing the BCM theory, this paper designed a sort of PFC chip named FT8201, and particularly introduced the implementation of this circuit. During the process of the design, in allusion to the narrow bandwidth of error amplifier in the APFC chip, an over-voltage protection circuit was integrated in, which was enabled to safely handle the over-voltage conditions. Along with reducing the input current crossover distortion, a THD optimization circuit added in. The optimization of the function block circuits of the chip were also introduced in the paper. Furthermore, they all have been simulated by Cadence software with CMOS models. The simulation results indicated that the circuit had a perfect PF and lower input current THD, all the guide lines can meet the requirements of the design.