Research And Design Of The Core Blocks In Low Dropout Linear Regulator

LDO regulators are a kind of integrated circuits of power management adopted extensively in the portable electronic devices. Because of the characteristics of simple structure, low power consumption, low production costs, small circuit noise, high PSRR (power supply rejection ratio) and so on, LDO regulators become the excellent solution of power management in portable consumer electronics.The thesis focused on the design of an LDO regulator with backup-supply switching function. Based on the LDO chip, the paper deeply discussed and researched the circuits and layout design of the core blocks in the LDO regulator.Firstly, the thesis researched and introduced the essential operating principle and the basic circuit structure in a linear regulator, generally discussed the important components and the system stability in the LDO regulator. In addition, the paper presented fundamental characteristic parameters in the LDO, and emphatically studied the influence that the circuits of the core blocks brought to the LDO.Secondly, so as to achieve the research and design targets, the thesis focused on the circuit design and simulation of the core blocks in the LDO.The whole design contained Bandgap Reference, Error Amplifier, Pass Element, Feedback Resistors, which works for LDO mode and low resistance PMOS switch, Supply Switching block needed by backup-supply mode, the Over-Current and Overheat protection circuit to keep the IC works safely.Finally, considered match devices, noise separation, and coupling reduction, the thesis studied the layout and placement of the whole circuit and discussed the optimized layout design of the key modules, such as Pass Element and PMOS switch, Error Amplifier with Buffer, Bandgap Reference.Based on the CSMC 0.5μm CMOS process, simulated the designed circuits by Cadence Hspice, the simulation results could imply that the line regulation and load regulation of the LDO is 0.03% and 0.001% separately, moreover, the temperature drift of the output voltage is 90.90ppm/℃.