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Design Of LDO In Digital Gyro System

Posted on:2017-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y F HuFull Text:PDF
GTID:2272330509456756Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As in recent years, gyro is widely used. The market pushes the Gyro system to get a better performance. The market demand at home and abroad promotes the study of the gyro system. Power management system as a key module of gyro system has become a hot topic. Now the power management system is mainly a combination of low-dropout linear regulator and switching power supply. This paper studies the application of capless low dropout linear regulator in digital gyro system.After a detailed presentation of LDO basic principle, present an analysis of the various key indicators of LDO, understanding trade-off relationship between the various indicators. Then according to the requirements of LDO system indicators, start to design each module LDO, including bandgap reference circuit, error amplifier. In order to improve the system temperature coefficient of the bandgap reference, take the high-order temperature compensation strategy, by using resistances of different temperature coefficient to compensate the higher-order terms of its temperature coefficient. Secondly, considering the LDO load changes quickly, the application of fast transient response compensation circuit can effectively improve the transient performance of the system. For system stability considerations, add a capacitor in compensation circuit compensation, so that this circuit has the effect similar to the Miller effect. Then the small signal equivalent circuit diagram is present to analyze system stability, to ensure system stability. Using a PMOS power tube to make sure the LDO can provide enough current to the load. And at the same time, the system has low dropout voltage. After finishing circuit design, circuit’s simulations of performance-related are presented, and further optimize the circuit based on the simulation results. After completion of all circuit-level design, draw low-dropout linear regulator layout.This design of low-dropout linear regulator uses 0.35μm process, and completed the specific circuit design and layout design in Cadence. Simulation results show that the LDO system in the 0 ~ 30 mA current range, the system is stable. Open-loop gain of 134 dB, the phase margin is greater than 60, at room temperature Linear regulation is 37.1μ / V, load regulation is 1.2μV / mA, temperature coefficient of 4.1ppm / ° C, overshoot voltage 103 m V, power supply rejection ratio at low frequencies of 82 dB. In summary, this paper designed LDO to meet system application requirements.
Keywords/Search Tags:low-dropout regulator, error amplifier, bandgap reference voltage source, no off-chip capacitor, Fast Transient Response
PDF Full Text Request
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