Research And Implementation Of Multi-core Processor Transaction Level Modeling And Multi-view Co-verification Methodology

As developing of the information technology, especially in the era of big data, data processing capabilities of computers have become increasingly demanded. C urrently multi-core technology has become main stream, but design verification problems are worsening. Statistics show that verification work accounted for 70% of the entire design tasks. Current verification techniques are mainly concentrated in the register transfer level and gate level, which is low efficiency and poor scalability.Electronic System Level(ESL) design methodology changes design hierarchy from the Register Transfer Level(RTL) to a higher abstract level, so that verification can be performed early in the system design, and facilitate early detection of functional errors. Thus the design efficiency and quality of multi-core processors functional verification can be significantly improved.Transaction Level Modeling(TLM) is intermediate level of RTL and system- level. Following separation of computing and communications, separation of timing and behavior, TLM hides unnecessary computation and communication details, and thus the model is more readable, the scale is much smaller than lower level, easy to explore the design architecture early, implement hardware and software co-verification and system- level functional verification. Common verification methods are used separeately in transaction- level multi-core processors verification. As lack of a unified integrated application environment, it is inconvenient, and low efficiency. In this paper, we focus on the deficiencies of traditional multi-core processors transaction- level verification environment, propose a transaction- level co-verification methodologies and integrated verification environment. The main work and results obtained are as follows:1) A multi-core processors multi- view transaction level co-verification method is proposed. Not as the traditional application uses a variety of different verification techniques separately, this method trate the simulation verification, formal verification(semi- formal verification), application verification of multi-core processors as three different verification views of the same verification of a transaction- level models. By dividing the verification tasks of multi-core processors transaction- level model, each verification view utilization industry advanced verification tools for every type of tasks. The design of multi- view co-verification methodology process and integration platform, achieves verification data sharing and multi- view co- verification, and achieves integration of transaction- level modeling and verification. Compared with the traditional verification methods, it can effectively improve the verification of multi-core processors transaction- level functional verification coverage, accelerate the verification process.2) The architecture of multi- view co-verification environment is built based on open transaction- level modeling and simulation platform So C Lib and Systen C. The multi- view co- verification environment architecture is divided into four levels. The base level and the tool level are basis of the environment, and the system level and application level are the main body of the environment. Application level provides modeling and verification tools to useres, and system level controls the switching of different views, the selecting of verification tools, the generating and management of verification data. Tool level integrates different verification tools. Basic level provides base class library, IP libraries and runtime environment. This architecture can effectively support fast modeling and multi- view co- verification of multi-core processors transaction level model based on IP reuse,3) According to the multi- view co-verification environment architecture proposed above, this dissertation implements a multi- view co-verification environment prototype MVIE. Based on System C libraries and So CLib platform, the unified system interface is developed by using Qt5. Using XML configuration files and software interface engineering control methods to achieve multi- view cooperative control, and using XML Schema specification to describe multi- view verification data, and through XML set to achieve verification data sharing and effective management.And using directory management, external calls and other technical methods to achieve multi- tool integration and management of shared libraries. Experimental results show that, multi- view co-verification environment prototype MVIE can switch different view flexibly, eliminate the tedious process of traditional single-view verification environment, which can effectively accelerate the multi-view co-verification process.