The Research On Infrared Image Preprocessing Technology And FPGA Implementation

In recent years, with the quick development of computer and digital image processing technology, the infrared target detection technique start to be extensive applied in many fields like making to guidance, tracking, automatic control, artificial intelligence etc. The requirements of the quality of infrared imaging are becoming higher and higher. As the infrared target has the characteristics of far distance, small area, weak shape, detail lose and low SNR etc., it is much more important and difficult to do the job of infrared image preprocessing in target detection. Infrared video image digital processing system is necessary circuit for IRFPA detectors, which is important to imaging quality. How to take full advantage of the infrared image preprocessing techniques to increase the distance of target detection is an important factor in the field of infrared lead.This paper proposes an efficient digital architecture for the cellular neural networks (CNN).The presented architecture is based on the combination of the bit-serial computation of distributed arithmetic (DA) with the characteristics of the CNN: the local connectivity and the translation invariance in the templates. Implementation of the CNN with the proposed architecture requires a low hardware complexity and a small number of bus lines. It consumes less silicon area because of the bit serial computation of DA and offers higher speed operation than the analog implementations of the CNN.As the key problem of image preprocessing with CNN is the design of template.Based on the study of PSO, this paper proposes a new method by using PSO's rapid convergence. The designed template is applied to edge detecting of image and the computer simulation results show that this method is better than the traditional algorithm results.A blue print of FPGA-based IRFPA video image digital processing system is proposed for testing the system scheme.The hardware of the system includes these function blocks as following: video A/D, data buffer FIFO, FPGA, data memory and colour space converter etc. The system can accurately read out the video signal of IRFPA, and then convert the analog signal into digital signal with A/D, and then the digital signal will be input into internal memory through FIFO, and CNN module carry out the processings such as edge dection. At last the system outputs the standard VGA analog video signal and propagates to LCD. According to the practical measurement of this system, the system performance meets with such requirements as stability, reliability and real time etc. And functionally, it is general to some extent.