The Research And Implementation Of Digital Pre-distortion On WCDMA Repeater

In modern society, the increasing demand for wireless communication services requires not only better transmission quality, but also larger transmission capacity. As a result, more efficient linear modulation methods have to be applied in the wireless communication to improve the data rate and spectrum utilization in the limited bandwidth band situation. However, more efficient modulation accordingly requires higher linear transmitter, which makes the linearization of power amplifiers one of the key technologies in the next generation wireless communication system.On the basis of some typical linear amplifier technologies proposed by predecessors, such as positive and negative feedback, non-linear device technologies, this thesis carries out a series of researches on the signal distortion issue of power amplifier, and also makes a comparison between several adaptive digital pre-distortion algorithms which are widely adopted in other studies. There are generally two adaptive digital pre-distortion algorithms, one is memoryless nonlinear pre-distortion and the other is memory nonlinear pre-distortion. The former one estimates various modificatory parameters of pre-distortion by comparing the amplitude and phase of feedback signals with input signals. The latter one needs to analyze current and historical status simultaneously and take the signal destroy caused by non-linearization and memory of power amplifier into consideration as well. After contrasting the two methods, this thesis focus on the analysis of the memory pre-distortion, makes a specific analysis and deduction with the polynomial pre-distortion algorithm. By means of the combination of digital signal process and FPGA, the algorithmic simulation and analysis are carried out in Matlab/Simulink environment embedded with system generator, the result proves that the performance and effectiveness of this algorithm are excellent.Another significant innovation is that the design of FPGA makes use of the idea of systematic design and is able to directly convert the codes into FPGA net list files or hardware description language once the simulation is completed, which greatly simplifies the development process and shortens the development cycle of the system.