Research And Application Of Test System Based On Boundary Scan Technology

With the development of intergrated circuit, it is difficult to test the complicated circuit quickly and efficaciously based on traditional test method. As a standard technique of test and Design-For-Testability for the circuit boards, Boundary-Scan technique can improve the testability and controllability of complex digital circuits effectively by means of embedding special boundary scan cells inside the circuits. As widely application of boundary scan chips, it is very important to develop a Boundary-Scan test system in order to enhance the testability, reduce the maintenance costs of the electronic equipment.In this thesis, the Boundary Scan technique is discussed in detail and a general test system based on BST is also developed. Firstly, a primary conception on BST standard IEEE 1149.1 and some applications about BST in board test was introduced. As to be groundwork, the functional requairement and design scheme is provided. Then the thesis gives a detailed introduction to the design of boundary scan test card and the development of test software. The test card builds an interface with data rate of 20Mbytes/s using CY7C68013 as USB chip.The chip works in GPIF master mode. Its boundary scan test controller implemented by FPGA provides test clock reach 24MHz and two test channels. With the application of OOP and Access database under Visual C++ 6.0, the test software can auto-generate test vector by test algorithm. This software with friendly interface is convenient to be used. Finally, the control circuit board for fault wave recorder is designed based on DFT and tested by the system.After tested, the test system meets the design demand and has some advantages such as high test rate, plug and play, easy connection, and so on. In application, the test system can test stuck-at faults, open faults and short faults on board, and achieves the anticipated target.