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SVPWM Signal Generator Design Based On FPGA

Posted on:2010-05-16Degree:MasterType:Thesis
Country:ChinaCandidate:B J HanFull Text:PDF
GTID:2178360278466688Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
Space Vector Pulse Width Modulation (SVPWM) technique is widely used in motor control systems because of its low voltage harmonics, low torque ripple and high voltage utilization. Presently, most vector control system is achieved with digital signal processor (DSP), but the structure of traditional DSP chips are serial in nature, which is not preponderant at all for executing bottom layer signal processing algorithms which are required to process a mass of data at high-speed with good real-time characteristic and high reliability. However, it is exactly the strengths of FPGA to do so. In this paper, a SVPWM signal generator is designed based on FPGA, and some of the key algorithms are researched theoretically and practised.First, the development actuality of domestic and international SVPWM technology is analysed based on many literatures. The content of study and work arrangements are brought forward aiming at the problems occured.Secondly, the principle of the motor vector control is expatiated comprehensively, the improved SVPWM algorithm is put forward aming at the requirement of sinusoidal modulation signal and integrated with sector estimation, to reduce the number of calculations significantly.Thirdly, according to the different location of zero vector is inserted, the characteristics of five-style and seventh-style are discussed in detail and compared.and five-style SVPWM switching sequence is adopted to compose space voltage vector, and the SVPWM signal generator IP core is designed according to the space voltage vector forementioned. Inverter bridge arm short-circuit accidents can be prevented effectively by inserting a dead zone delay.Finally,introduce parts of circuit and pin allocation in FPGA,and the signal generator is simulated and analysed with Quartus II and tested on DE2 board, the results show that the SVPWM algorithm proposed in this paper meets the requirements of all-digital motor control system based on SVPWM control strategy with good real-time characteristic and high reliability.
Keywords/Search Tags:Motor Control, FPGA, SVPWM, IP Core
PDF Full Text Request
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