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The Design And Development Of MVBC Using FPGA

Posted on:2010-04-22Degree:MasterType:Thesis
Country:ChinaCandidate:C LuoFull Text:PDF
GTID:2178360302460862Subject:Communication and Information System
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With the rapid development of computer network and embedded control technology, railway system, as the traditional transportation industry, has new demands on it, so the train communication network (TCN) emerges as the times require. Through the development for many years, in order to standardize the TCN, the International Electrotechnical Commision (IEC) adopted the standard IEC61375-1 in 1999. The standard divides TCN into two buses: the wire train bus (WTB) and the multifunction vehicle bus (MVB). The MVB is a standard communication medium to transport and exchange data among attached devices. The Multifunction vehicle bus controller (MVBC), which mainly achieved the function of the MVB's data link layer, is an interface component between the MVB and the actual physical layer of the MVB. Because this technology is monopolized by foreign companies, it is extremely urgent to develop our own MVBC with independent intellectual property.In view of the reasons mentioned above, the standard IEC61375-1 is deeply researched in this paper. According to the technical features of MVBC, the scheme that achieves its specific function with FPGA is presented in this paper. There exist five classes of devices attached to the MVB, which differ in their capabilities. The MVBC that supports Class 4 devices has the capabilities: device status, process data, message data and bus administrator, and it is also compatible with Class 2 and Class 3 devices. The purpose of this paper is to achieve MVBC with FPGA, which supports Class 4 devices.A top-down design method is adopted in this paper. Based on the method, the entire MVBC is mainly divided into several modules: encode module, decode module, redundancy controller, telegram analysis unit, traffic memory controller, main control unit, and address logic module. Xilinx ISE is used in the whole development process. RTL modules mentioned above are described by Verilog HDL and synthesized by Synplify Pro. Finally, post-route simulation and verification to each module is made in ModelSim.Under laboratory conditions, the results derived from strict simulation and verification prove that the modules designed by this paper meet the requirements of IEC61375-1. So, it can be believed that the scheme of implementing the MVBC with FPGA has a good operability.
Keywords/Search Tags:Train Communication Network, Mutifunction Vehicle Bus, Mutifunction Vehicle Bus Controller, FPGA
PDF Full Text Request
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