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Hardware Design And Implementation Of On-board Image Compressing System

Posted on:2015-11-24Degree:MasterType:Thesis
Country:ChinaCandidate:X Y WangFull Text:PDF
GTID:2180330464967921Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
UAV aerial technology is widely used in national defense and civilian fields, with its high-efficiency, flexibility and real-time precision. UAV Aerial process requires image compressing in order to transfer and store data efficiently. So onboard image compression system is indispensable in the design of unmanned aerial vehicle image processing and storage devices. The onboard image compression system, with real-time image compression and transmission, stable mass data storage and high-speed data downloading, however, the advantages of small size, lower resource utilization, fast processing speed and high stability, has been applied in "XX" UAV.In this paper, the hardware design and implementation of image compressing system will be described, the author’s major contributions are outlined as follows:1. The implementation of image compression algorithm based on FPGA. The hardware design of onboard system platform uses FPGA to meet the needs of tow-power, low-resource and high processing speed. The system uses SPIHT algorithm as the image compression. The image compression rate up to 30MB/s. Due to the limited hardware resource of UAV image compression system, multi-level reusing wavelet transform coding structure is used in the logic design, and resource utilization of which reduced compared with the traditional wavelet transform coding structure. The main resource usage fell as much as 50%.2. The hardware design and implementation of CF card control and storage based on FPGA. Using industrial grade CF card as storage medium to meet the UAV storage devices are small, large storage space, stable performance, fast read and write speeds and other needs. That can store large amounts of data stable at low temperatures and vibration working environment. To solve the storage problem of slow data storage rate. With FPGA as the main chip, design programmable logic to control CF card writing and reading the state of UDMA-6 in the model Ture-IDE. Ensure that the data transfer rate exceeds the 60MB/s, and the highest rate of up to 100MB/s. The data storage rate of the compression system is 2 to 3 times than the previous.3. The hardware design and implementation of USB3.0 data transmission path based on FX3 peripheral controller. In order to achieve that mass data stored in CF card can be fast download to local PC to be processed and analyzed through FPGA controller, the system uses FX3-USB peripheral controller to implement the USB3.0 high-speed data path for data transmission between FPGA and PC. With that, data transmission is stable and the rate can be up to 30MB/s. Transmission rate is much higher than other common transmission path4. The hardware design and implementation of gigabit network design based on Zynq platform. In order to solve the local PC to download store data on remote wired high-speed path, and data processing while the data transmission without affecting the data transmission speed problem The system uses Zynq platform to transfer data via gigabit network between FPGA and PC in order to achieve wireless high-speed downloading of data stored in local PC to UAV. And achieve the gigabit network transmission channel with transmission distance up to 500m and transmission rate up to 20MB/s.5. Analyze the application performance of high-speed data transmission path based on FPGA. To solve the problem of data exchange between FPGA and PC under different working conditions. Design the USB3.0 and Gigabit network data transmission paths to meet the high-speed data transfer between FPGA and PC through peripheral control equipment. Analyses the performance and features of the two designs comparatively, and summaries the application conditions. Make two kinds of data transmission path can be quickly applied to different data transfer and downloading engineering work.Finally, the on-board image compression system can be improved and optimized from the following aspects. Choose the better image compression algorithm to improve the compression rate, reduce the resource usage by improving the compression encoder structure, use the SD card to reduce memory size or use solid state drives to increase the storage capacity.
Keywords/Search Tags:Image impression, FPGA, CF card, USB3.0, Zynq
PDF Full Text Request
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