Airborne Bistatic Sar Imaging Algorithms In Fpga Design And Implementation

Bistatic Synthetic Aperture Radar (Bistatic SAR) is a new radar system. It becomes an important development trend in SAR technology field and plays a significant role in military as well as civil application in the future. Bistatic SAR is becoming one of the hotspots in radar imaging technology in recent years. This paper attempts to implement the Range-Doppler (R-D) imaging algorithm on bistatic SAR using FPGAs.As to imaging algorithm, the paper illustrates the features of Bistatic SAR, derives the Radar fomular,and analyzes the restriction relationship among main parameters. As to broadside airborne bistatic SAR,the paper extends the R-D to conclude the simulation results.As to the FPGA realization of imaging algorithm, the paper accomplishes fix-point simulation using System Generator, complete FPGA implementation including FFT,multiplier,Rocket I/O,DCM, etc. It simplifies the algorithm in accordance with hardware feature.To testify this design,the paper developed the hardware testing platform mainly base on ML310 demo board, inchulding one XC2VP30 chip, which has Power PC405 embedded in. The testing board design mainly includes Aurora interface,RS-232,DDR RAM, interrupter and clock, etc..