Psm Controller Main Module

Pulse skipping modulation, due to its high efficiency at light loads, is very popular in DC to DC converter of power switching supply.This thesis, firstly, introduces a boost converter with improved PSM control proposed by other members in our team. The control circuit contain current-limited comparator, current-limtied state machine, voltage reference, digital control, sequence detect and main control gate. The layout of these control circuits with 5μm technology is presented. Then, this thesis rearches on some important and often used analog circuit blocks in DC-DC converter with PSM control. It include current-limited comparator, voltage reference and error amplifier.Current-limited comparator consists of three components including inductor current detector, inductor comparator and slope compensator. Firstly, an improved inductor current detector with low cost and high accuracy is proposed. Then, a novel inductor comparator with low cost and low power consumption is presented. Finally, a self-regulated and high accuracy slope compensator for boost converter is proposed. For voltage reference, first of all, this thesis introduces the principle of first-order and high-order temperature compensation. Next, an improved curvature compensation technique and its corresponding circuit structure are proposed. The simulation results show that the proposed voltage reference has three-order temperature compensation and its temperature coefficiency is about 0.52ppm/0C.For error amplifier, this thesis only concentrates on the amplifier with large load capacitor using sigle miller compensation technique. An improved low voltage three-stage amplifier with new frequency compensation technique is proposed. Compared with other structures and compensation techniques, the presented error amplifier has better frequency charateristics, and it could break the limit of voltage gain and -3dB bandwidth to the bandwidth, which is very useful for LDO applications. The simulation results show that the bandwidth of the proposed error amplifier is about 22MHz, the DC voltage gain is about 100dB, the phase margin is about 62o and the miller capacitor is only 2pF.