A Dual Output Step-up Dc / Dc Chip Design

With the increase of PDA's function, the requirement of power management chips becomes more and more. It is not economical to combine many chips on PCB, an alterative way is to integrate more functions on one chip. Under this condition we designe a dual step-up DC/DC transform chip. The chip includes two step-up convertors, it could provide two different outputs: The main-display is designed to drive up to 5 white LEDs with constant current while the sub-display is designed to power an organic LED display with constant voltage. Two convertors use different control methods, main-display in peaking current pulse width modulation(PWM) mode operation for low output ripple and fast response while sub-display in pulse skip modulation(PSM) mode operation for high efficiency .The chip is based on UMC 0.6μm BCD process. With wide input voltage range from 2.6V to 5.5V, it could drive up to 5 LEDs at 20mA and 4 LEDs at 30mA for main-display and up to 20V at 50mA for the sub-display. High efficiency up to 80% can be obtained. High frequency (1.1MHz) allows easier filtering and faster loop performance. Three bulit in power MOS transisitors could cut off main-display or sub-display and allowed the chip to use less external components. The chip has under voltage protection, over voltage protection, over temperature protection and cycle-by-cycle current limit. It is suitable for Flip-phones/Clam-shell Cellular Phones, Handheld Devices, High-fashion cellular phones, White LED Backlighting, Digital Cameras.In this thesis, the development and research value of high integration and high efficiency power management chip were given firstly. Then, basic principles of boost conventer and peaking current control PWM mode were discussed. The whole chip diagram was proposed according to the design specification and the whole chip operational principle was introduced. Based on the whole chip function requirements, sub-block design and simulation were completed, including oscillator and slope compensation, error amplifer, P1 and N1 driver. At last, the whole chip function simulation, typical performance characteristics and loop stability simulation were presented. The simulation results indicate that the chip has achieved the design specification. This thesis is a production of circuit principles and simulation practice and has good reference on the design of high integration and high efficiency circuit.