Current Mode Dc / Dc Boost Controller Chip Design

In this thesis, a current mode step-up DC/DC controller was presented. The design was based on the CSMC 0.6μm DPDM CMOS process. The EDA tools used in the design include the Cadence custom design platform-Virtuoso, the simulation tool-HSPICE and the verification tool-DRACULA.The controller was designed to generate output voltage as high as 10V with wide input voltage range of 3.0V to 5.0V. High frequency (500kHz) allows easy filtering and faster loop performance. Slope compensation maintains stability at high duty cycle. Soft-start can eliminate the inrush current when controller starts up. The embedded LEB(Leading Edge Blanking circuits) avoids the extra blank circuit. This controller can operate in the temperature rage of -25℃to 85℃.In this thesis, basic principles and some key points of a current mode DC/DC converter were given firstly. Then, the whole chip diagram was proposed and the whole chip operational principle was introduced. Based on the whole chip function requirements, sub-block design and simulation were completed, including bandgap voltage reference, error amplifier,oscillator, slope compensation, PWM comparator, control logic and driver. Then the whole chip function simulation and typical performance characteristics simulation were presented. The thesis also introduces the full custom layout design of some key modules and the whole chip. The whole chip occupies 1715x1331um2. The controller is taped out via MPW in CSMC. The test of the whole system is still in hand.The thesis is a production of circuit principles and practice. This effort accumulates more experience to design step-up DC/DC controller with more perfect performance for the future.