A Nano-power Low Dropout Cmos Linear Regulator

With the popularization and rapid growth of portable electronic products, the equipments with more excellent performance and lower power consumption are required more than often. However, battery technique will not be improved recently. Chip designers are facing unprecedented pressure to improve the efficiency of battery-powered equipments and prolong the usage of battery.This paper is based on the project "Theoretical research and design of key techniques for deep-submicron mixed ASIC". A nano-power low dropout CMOS linear regulator, XD9527, is introduced. The work of this paper include definition of the specification, further analysis of the electrical characteristics, realization of sub-block circuits, layout and post-simulation of the whole chip. The static power consumption is sharply reduced due to the ultra low quiescent current, which is less than 1μA in typical condition. And the efficiency increases consequently because of the low dropout voltage and ultra low quiescent current. With the novel dual adaptive compensation technique, the system can be stable with low-cost and space-efficient ceramic capacitor, so it is very suitable to the portable design. Furthermore, the power consumption at over-load condition becomes much low due to the use of the foldback-current limit, other than traditional constant-current limit.XD9527 is based on the 0.5μm standard CMOS process and now is in the process of shuttle. The simulation has been completed under process corners, various voltages and different operating temperatures by utilizing the EDA software, such as Cadence. Hspice, etc. The results of simulation indicate that the quiescent current is 1μA in typical condition. the static power consumption of the chip about 3μW, and the dropout voltage is 140mV when load current is 100mA and all of other characteristics meet the specification too.