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Fpga-based Soft-core Processor Niosii High-precision Time Interval Measurement

Posted on:2009-09-06Degree:MasterType:Thesis
Country:ChinaCandidate:J W ZhangFull Text:PDF
GTID:2192360242985745Subject:Physical Electronics
Abstract/Summary:PDF Full Text Request
Time interval measurement widely applies in many fields including atomic physics, astronomy experiments, laser rangefinder, positioning timing, aerospace telemetry remote control, moreover broadly applied in 1C design of jitter measurement, Automatic Test Equipments, the angle modulation signal of Digital Communication, and Digital Oscillograph. The technology of high-precision pica second measurement plays an indispensable role in military and aerospace science field.For the sake of satisfying the request of users' huge measurement load, we propose that through replacing slow SCM control circuit with FPGA+NIOSII core software, it can write the processing data of TDC chips into FIFO of FPGA logic quickly, and accordingly, reconfigure the measurement using TDC chips so as to carry out the data processing, and the sequential measurement at the same time. In addition, concentrating on the error resulted in by the counting resolution in the limited distance, and combining it with the traditional method of improving the time resolution, we embark on the research, development, and renovation dealing with the technology. It brings a profoundly significant practical influence using TDC chips compared with discrete components, greater scale, higher work speed, higher time resolution, and smaller counting error. It can overcome the disadvantage of discrete components, including reducing the scale of circuit, miniaturizing the TIM system, reducing the hardware costs, improving the reliability, flexibility, adaptability of the system, and shortening the development cycle.Through the research of TDC-GP1 chips development information, we put forward utilizing TDC-GP1 chips combined with the design of time interval measurement system of embed FPGA processor, and scheme out the hardware part(PBC interface board and FPGA logic)and software part(embed NiosII software).Experiments proved that the resolution of time interval measurement can achieve the results:125ps,single channel;250ps,dualchannel,and measurement time range:3ns-7.6us.
Keywords/Search Tags:NiosII, TDC, Time interval measurement, FPGA
PDF Full Text Request
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