Design And Implementation Of Embedded Microprocessor Integer Part

The dissertation focuses on the research and design of 32-bit microprocessor architecture. This kind of CPU is popular used in industry control and weapon equipment. This dissertation provides a new method for design of this kind of CMOS chip.Amex86 is compatible of Intel80486 instruction set. Amex86 microprocessor is composed of Integer Processing Unit, Float-point Processor Unit(Math Coprocessor) and Protect Test Unit. This paper analyze the architecture of Amex86 microprocessor, including the analyzer of Instruction System, Addressing Mode, Scheduling and Clock of Instruction, the integration and validation of Amex86 architecture. This paper mainly discusses the design and realization of Data Path and Instruction Decoder in detail.On the foundation of architecture analyzer, this paper presents triple bus construction of Data Path on the basis of Amex86 architecture. This design ensures the instruction pipeline. Reading the complex instructions into decoder is a difficult point, but this paper solves how to read instructions correctly into decoder.The work of this paper is as follows:1. Analyzer of 80486 Architecture;2. Analyzer of 80486 Instruction Structure;3. Design and Realization of Data Path;4. Design and Realization of Instruction and Micro-program under Real Mode;5. Design and Realization of Instruction Decoder;6. Realization of Amex86 Architecture on FPGA;7. Test and Simulation of Amex86 Architecture.The dissertation work plays a great significance for studying the military microprocessors with own intellectual property. The research work offers design considerations and technological reserves for further advanced microprocessor designs with Amex86 architectures.