Microprocessor Verification Platform

Verification becomes the bottleneck of entire design flow. It is now dedicated to verification between 60% to 80% time and effort. How to implementation the verification platform to achieve the success of functional verification quickly and efficiently is one of the hot points in IC design and verification fields.Based on the National Defense Preliminary Research Projects, the dissertation describes how to design and implement the microprocessor verification platform. The platform is applied in the functional verification of Longtium C1 and Longtium S1.The research of this dissertation mainly includes:1. Complete design and implementation of ALU and micro program controller unit of Longtium Cl on the basis of analysis of CISC system architecture.2. Present the bottom-top hierarch functional verification strategy and establishes verification plan According to the system architecture's features of Longtium Cl.3. Implement the random transaction driven verification environment, and apply in all functional units of Longtium Cl with the 100% functional coverage and code statement coverage.4. Present a new approach that can build a system level verification platform quickly by means of extending virtual system named Simics. A system verification platform named VMSIM is developed in that approach, which can simulate peripheral hardware environment for Operating System and can simulate 49.4 times faster than traditional verification environment. VMSIM can simulate real world applications like Operating System.VMSIM was applied in system verification of Longtium Cl with the 100% functional coverage and code statement coverage.5. Present the design scheme of software/hardware co-verification environment based on virtual system, and describe the design and implementation of the key component --proxy device.The dissertation's work is not only carried out for the verification of Longtium Cl, but also can be extended to support the verification of other microprocessors. The research work offers design considerations and technological reserves for further advanced microprocessor verification.