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Research Of SPI Module Level Verification Platform Based On VMM

Posted on:2017-03-15Degree:MasterType:Thesis
Country:ChinaCandidate:K X LiuFull Text:PDF
GTID:2348330488472979Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the great increase in the scale and complexity of integrated circuit, verification work also have increased. In consequence of the verification technology development could not matching the high speed of IC design, the traditional verification method has been unable to meet the needs of the verification work today.The functional verification have become an important factor to the IC design. So, finding the verification method which is new-style?efficient?reusable, maintainable has the most important significance.Under the impetus of the validation requirements, the VMM(Verification Methodology Manual)emerged. VMM verification methodology is based on System Verilog, absorbing the object-oriented programming methods,and also have the adaptability of Verilog to integrated circuits. This essay mainly research in this new methodology of verifacation, to set up an automated ? reusable ? and complete verification environment. Completely extracting function point by the analysis of SPI(Serial Peripheral Interface) protocol and the design requirements,and building the functional coverage group. In the validation process with functional coverage as the guidance, to control the verification work.Writing the test cases according to the verification function point.Using the direct testing and random testing methods together, to generate a lot of interest incentive driving the design under test.Make the design under test running in various expected situation. Using the scorecard,assertions, such as validated automated tools, to improve the efficiency of verification.Building the reference models which is used to communicate with the design under test.This reference model has the ability to send or receive specified format data with design under test according to the SPI protocol.Using the VCS software simulation,and checking the waveform by DVE,to analyze coverage report and ensure the comply with the design requirements for the design, and completing function verification work of the module.This essay mainly research in the characteristics and advantages of the VMM verification methodology, and the method of building testbench of SPI module in RTL level.Creating the functional coverage model, and buliding the self-checking module and the reference model which is conformed to the protocol specification.Writed 14 test cases, and 16 assert statement.The results shows that the testbench which is based on VMM methodology has character of the a clear orientation of verification, reusable components structure, faster coverage collecting rates, and self-checking structure. This verification platform could complete the verification work of the SPI module efficiently.
Keywords/Search Tags:IC, Functional Verification, VMM, Functional coverage, SPI
PDF Full Text Request
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