| This paper presents detailedly design and implementation of gigabit Ethernet wire speed line card with ten interfaces. Line card is one kind of network interfaces of terabit routers, connected the router with gigabit Ethernet. On the basis of analyzing design difficulties of gigabit Ethernet line card and gigabit Ethernet protocols, this paper illustrates modules division, chips selection and realization of all modules of line card according to function demand and performance demand, at last the debugging scheme and test results are presented.According to designing process of line card of ten interfaces, this paper illustrates research fields in sub modules dividing, chips choosing, sub modules realizing and system debugging, the main contents are as follows:First part: current research work and difficulties of gigabit Ethernet line card are analyzed, the interfaces of line card with terabit router and the format of MAC frame are introduced.Second part: according to function demand, performance demand and data processing procedure, function modules are divided, and PM3388 is selected as link process chip and two high-performances FPGAs as control chip, detailed implementation scheme of system design is provided. Realization of the control function of two FPGAs is explained for emphases and the difficulties in it are analyzed deeply.The third part: as an important respect of design and implementation of line card, the detailed debugging scheme is provided. According to the principle of modules and progressive, the debug of the line card is finished and the test results are provided in this paper.The fourth part: a two-layer implementing structure for implementation of frame regrouping and speeding up is proposed, which can get good performance of speedup; a multi-layer scheduling algorithm MURR with good time delay performance is researched, which can realize high speed data combination scheduling for ten interfaces. |