Study On Cisc Microprocessor Storage Management Unit

Supported with most quantitative application software, CISC processor is one of the most widely used, while its memory management architecture is one of the most complex in contemporary general-purpose processors.I am involved in "National Advanced Research Project", which is to implement LongtiumC2, a 32-bit embedded CISC processor. After analyzing the 32-bit Intel Architecture processor (IA-32), the author designs the architecture of LongtiumC2's memory management unit (MMU), which supports real mode, protected mode and virtual 8086 mode simultaneously.The research work of this paper mainly includes:1. Studied the address-space management and protection mechanism of the IA-32 processor and analyzed the recent achievements on MMU research, from which the main idea of the LongtiumC2's MMU arose.2. Taken part in LongtiumC2's architecture and pipeline design, and mainly proposed the architecture of MMU, which uses paged segmentation to translate logical address to physical address in the three operation modes. If the necessary translation information is in the hardware-managed TLB, the system can carry out the address translation in one clock cycle without accessing the page table. What's more, MMU provide the protection with the help of access attributes.3. Designed flow control logic for LongtiumC2's MMU to solve the problems, such as TLB-miss, the holding of the unit following in pipeline, micro-instruction branch prediction, and the access of data or instructions reserved in two continuous pages or Cache lines.4. According to the verification plan, built the TestBench model to test MMU in module level. Through code check, timing verification, coverage check, function verification and FPGA verification, fully verified the LongtiumC2's MMU.The dissertation does some research about 32-bit embedded CISC microprocessor architecture supporting protected mode, and accomplishes the design of LongtiumC2's MMU. The research work offers design considerations and technological reserves for higher performance microprocessor designs with x86 architectures, which plays a great significance for developing the CISC microprocessors with own intellectual property.