| Recently, the need of high-speed data transmission and multimedia services make Multiple-Input Multiple-Output (MIMO) technique and Orthogonal Frequency Division Multiplexing (OFDM) become hotspot in the field of wireless mobile communication. MIMO-OFDM has been regarded as the key technology of B3G communication system because it can improve system capacity and spectrum efficiency. However, OFDM is very sensitive to frequency offset. Then synchronization is significant to B3G system.During the National"863"FuTURE Project, UESTC is in charge of the B3G TDD downlink that bases on FPGA. The downlink consists of five boards which are responsible for digital-baseband transmitting, multi-antenna transmitting, multi-antenna receiving, channel estimation and digital-baseband receiving respectively.This paper is responsible for multi-antenna receiving board and has finished the FPGA design of synchronization and OFDM demodulation. Simulation and testing results have proved the performance of B3G downlink.Chapter one and chapter two introduced the background of this dissertation, development software and the character of devices summarily, such as Xilinx XC2VP70 chip and AD6644.Chapter three described the algorithm of synchronization and OFDM demodulation and improved the method based on hardware realization.After introduction of the whole FPGA design of B3G downlink, chapter four schemed out every function module such as time synchronization, frequency synchronization, timing recovery, last frame detect, OFDM demodulation and Rocket I/O interface etc. Lots of structure schemes and simulation waves were presented.Chapter five proved the validity of FPGA design based on ChipScope and circuit testing and analysed the resource and running speed.Finally, in chapter six, we summarized and concluded the whole dissertation. Further research issues and possible research directions were pointed out. |