Low-power Design Of Fpga-based Embedded Systems

The power loss question is in the last few years the universal attention difficulty and the hot spot in the embedded system design, it seriously restrict embedded system's application and development. Both in the military and the commercial application, the considerable amount embedded system is generally, moreover the majority equipment which supplies power by the battery all have the volume and the quality restraint. Reducing electrical energy consumption not only can lengthen the battery's life, extense the cycle of user replacing battery, but also it can enhance the system's performance, even can play the protection environment role. On one hand power lose question can cause the design repeatedly ,on the other hand the expense electronic products with the low power component cause cost savings, The related statistical data which the low power component brings with the expense savings in electronic products indicated that, we will have more to consider the power design question in the integrated circuit design in the future. The EDA profession always pays attention to the functionality design question, and has developed the corresponding technology, provides many kinds of better and quicker simulation and analysis tools for the designer to solve these functionality problems. The present paper has conducted the low power loss research and the analysis in view of image processing board based on FPGA .This article firstly analyzed each kind of reason causing power loss and the power loss classification in the embedded system , secondly studied certain methods to reduce the power loss in the hardware design and in the software design process. Thirdly, Based on the function and structure of the image processing board , from the clock restraint, the succession restraint, the optimized algorithm, the gating clock and so on several aspects, carried on the studies to fall consume controling and simulation in software, and measured and compared the system before contoling and after contoling power loss.