A 16-bit Sigma Delta Audio Adc Chip Design

Oversampled ADCs based on∑⊿ modulation are well-suited to the implementation of analog interfaces in digital communication and signal processing systems. These converters exploit the enhanced speed and circuit density of modern VLSI technologies and overcome limitations on resolution that result from the component mismatching. Now∑⊿ ADCs have been widely used for high resolution A/D conversion.The principles of oversampled∑⊿ADCs are discussed firstly. Then various architectures of low pass∑⊿ modulators are studied, and high order system design methods are especially explored. The impacts of the actual circuit nonidealities on the system performance are also analyzed. One architecture of∑⊿ modulators with 20KHz bandwidth and 16-bit resolution is designed, which uses five order single loop and single bit quantizer architecture with fully differential switched capacitor, whose oversampling ratio is 64 and sampling frequency is 2.8MHz. It is implemented in the CSMC 0.6μm CMOS process with double-poly and double-metal. It operates under a single 5V supply and the output range of the quantizer is 5V. Under the conditions of 2.8MHz sampling frequency, -9.5dB input amplitude and 10 KHz signal frequency, both system and circuit simulation results show that the modulator achieves and approaches 16 bit resolution, satisfying specification well.