Research And Implementation Of Baseband Processing Technology Of High-dynamic And Dual-system Compatible Navigation Receivers

With the development and improvement of satellite navigation system, Research on multiple system compatible receivers has become the trend. And the receiver with high dynamic performance has been widely used in military field. The receiver mentioned in my paper is compatible with GPS, GLONASS dual system and with high dynamic performance. In addition, the receiver has some functions such as quickly capture, hot start, time transfer and self-integrity detection.The theoretical analysis, program design, performance analysis and algorithm implementation of capture and tracking algorithm, time transfer algorithm, carrier phase smoothing pseudorange algorithm and self-integrity detection algorithm are discussed in this paper, starting from the theory, combined with the actual research process. It selects the hardware platform of FPGA and DSP to complete the overall design of the dynamic dual system navigation receiver. The signal dispreading and demodulation are completed on FPGA. DSP is mainly to complete the functions of PVT and time transfer. At the same time, the loop and capture strategy are also completed on DSP. This paper has some simulations of important modules on the FPGA through modelsim. Besides, the test of the tracking loop under the high dynamic scenes verifies the availability of the design. It analyses the theory of navigation time transfer and develops a specific program, combined with the realization of project. Compared to the JNS100board, we can achieve the accuracy of±50ns. It can meet the requirements of design. In addition, self-integrity detection algorithm and the effect of time transfer algorithm for carrier phase smoothing pseudorange algorithm are analyzed in the paper.