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Design And Implementation Of Data Synchronous System For Merging Unit Based On Fpga

Posted on:2013-08-24Degree:MasterType:Thesis
Country:ChinaCandidate:B ChenFull Text:PDF
GTID:2232330374482910Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the digitization and integration of digital substation equipment, some functions of spacer layer are implemented in the process layer, which make the structure of process layer more and more complex and important. With the highly strict demand of data synchronicity in the protective device of substation, the merging unit’s synchronization delay, from data collecting to data sending, should be both short and stable. However, the calibration time is usually not precise in current substations. In order to solve the problem that sampling data is not synchronous, this paper designs a kind of synchronous system using FPGA. This has important theoretical significance and practical value to realize resource sharing and system integration in substation.This paper first describes the development of digital substation and current research of sampled data synchronization at home and abroad, and then analyzes the merging unit with digital interface role. According to the specific functions of synchronous unit, a data synchronous system is proposed in this paper. This system is divided into multi-channel data sampled module, data synchronous processing module and data communication through Ethernet module.By the in-depth analysis of synchronization problems, sampled data is synchronized with Newton interpolation algorithm. This algorithm takes advantage of sampling information of the merging unit’s accurate arriving time and packet’s delay time to calculate the corresponding sample in local time. Then it can get the sample information of different merging units at the same local time using interpolation calculation. Compared with traditional way. this method realizes sample value synchronization without external synchronous clock source.Because synchronous unit need to complete collecting and real-time processing of multiple parallel data, so should have many I/O ports and it deals with digital current and voltage signal. This process of maximum error shall not exceed4μs for protective equipments and not exceed1μs for measuring devices, which is really difficult for single microcontroller. And now multiple microcontrollers on-line processing is more used in the synchronization scheme. Although this can solve the problem, integration of system is not good and performance is low. So FPGA is used in system. Being adopted modular design to make each sub-module collateral execution, speed level is ns. The simulation and experiment results demonstrate the validity of proposed method, and accuracy meets the requirements of digital substation secondary equipment on sampled data synchronization. This system is very meaningful and important to the automation development of power system.
Keywords/Search Tags:Data synchronous system, Ncwton interpolation algorithm, Merging unit, FPGA
PDF Full Text Request
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