Research Of Trojan Circuits And Target Circuits

With the advances in IC technology and the increasing design complexity, an IC shall be made by not only one part. These parts or suppliers include the third-party who provied IP cores, EDA tools, and foundries. They can tamper with the original design and insert redundant hardware Trojan circuits. They will pose severe risks to the whole application system. Thus the hardware Trojan detection has caused wide public concern.This article expatiated in detail upon hardware Trojan taxonomy, self-protection mechanisms and detection methods, and investigated the trigger mechanism. Based on the contemporary SoC system, this paper focused on the target circuits’design: ADC and UWB transmitter. ADC adopted the successive approximation register algorithm. The layout of DAC was on the basis of the standard cell, which contained the unit capacitor and the corresponding switch. The measurement results had shown that this proposed ADC achieved 10 bit at 250 KSPS under the supply voltage of 3.3 V in GF 0.35μm CMOS process. In UWB transmitter, the pulse generator circuit was simple and occupied small chip area. The whole UWB transmitter circuit had been designed and would be verified in SMIC 0.18 um CMOS RF technology. In addition, some trigger circuits, such as time, glitch, temperature, etc, had been designed. Finally based on the above work, two kinds of hardware Trojan circuit had been accomplished. They would be used for APTG-based and side-channel signal test. To build the hardware Trojan model, it is necessary to test these taped-out circuits, record relevant data, analyze them with Matlab and summarize the law of the relevant variable.This paper aims at target circuits, the trigger mechanism and hardware Trojan circuits. This is a meaningful exploration on the hardware Trojan detection.