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Online Power Quality Analyzer Data Storage And Transmission Technology Research

Posted on:2013-10-02Degree:MasterType:Thesis
Country:ChinaCandidate:G L WangFull Text:PDF
GTID:2248330374457075Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the rapid development of smart power grid technology, moreand more equipments which can affect the quality of power areintroduced into the power grid. It usually requires to use a power qualityanalyzer to monitor the electrical parameters. However the monitoringprocess will produce a mass of data parameters which need to beprocessed, yet these data often need long-term preservation. If they arenot processed by real-time compression storage and transmission, theywill have a greater negative impact on power quality analysis results.The paper makes a research on the problem of massive data storageand transmission technology in on-line power quality analyzer, trying tofind a method to solve the problems of massive real-time datacompression storage and transmission. By using on-chip programmabletechnology SOPC, the paper designs a system which selects the FPGA ofXilinx company as the core chip to realize the data storage andtransmission in power quality analyzer.Firstly, the paper introduces the background and significance of theresearch, and briefly describes the advantages of SOPC technology for embedded development and the SOPC development process of Xilinx.Subsequently it introduces the MicroBlaze soft-core processors and theassociated IP core technology, and then it illustrates the overall systemdesign, LZW compression technology, and the improved LZW.Secondly, the entire system determines the hardware design schemebased on data storage and transmission of power quality analyzer. By theselection of a variety of chips, the XBD file is compiled on the basis ofthe hardware platform board-level description, and the minimum systemis established by the file. According to the function of data storage andtransmission in the power quality analyzer system, the needed IP core isadded into to the minimum system. These IP cores include the QuickLinks FSL bus IP core, the serial communication controller IP core, thereal-time clock IIC bus IP core, the CF card storage SysACE controller IPcore, the Ethernet transmission controller IP core and the user-defined IPbetween FPGA and DSP.Furthermore, the paper determines the software design scheme basedon the system. On the basis of the hardware platform system, the softwaredesign of data reception storage and transmission primarily achieves thefollowing functions: serial communication, the FPGA through the FSLbus to receive data from the DSP, the FPGA using the CF card for datastorage and LZW compression data, and the FPGA using LwIP protocolthrough Ethernet interface to upload data to the host machine. Finally, by the software programming, the paper achieves the majormodules in the power quality analyzer data storage and transmissionsystem, tests each module in turn and draws the results of the testingprocess. Through the joint test among the modules of the overall system,the validity of the entire system is verified.
Keywords/Search Tags:SOPC, FPGA, XBD, FSL bus, CF card, LwIP protocal
PDF Full Text Request
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