Design And Implementation Of Data Acquisition And Real-time Processing System Based On FPFA And USB2.0

In the data detection and analysis, data acquisiton and processing system hasbeen widely applied. The FPGA as the rapid development of programmable logicdevices,is playing an increasingly important role in data acquisition andprocessing,and has been replaced by the DSP chip even in some high speed and largecomputing applications. The system used FPGA as the core chip to control variousparts’ work and process the data, and use USB2.0as the interface to complete the datatransfer between the system and the computer.The paper introduces the ADC,FPGA chip and USB interface chip in detail thatare involved in the system and uses the PROTEL DXP software to draw the hardwarecircuit schematic and the PCB layout of the system. The paper aslo introduces theFPGA development platform ISE which is provided by the Xilinx company, anddesign each function module by using the Verilog HDL language and the IP core inthe ISE software, and further simulate the function of each module. The firmwareprogram of the USB2.0interface chip and the application program in PC areintroduced in the paper.The paper describes the system which is the data acquisition and real-timeprocessing part of the subject “marine phytoplankton size distribution andconcentration of on-line monitoring system”, and the maximum acquisition frequencyof the system is5MHz. The system is mainly used to collect the fluorescent signal anddoppler signal and its specific work process is as follows. The measured signal entersthe operational amplifier circuit for processing, and then enters the ADC, so theanalog signal is converted into the digital signal by the ADC under the control ofFPGA, and then,the digital signal is read into and processed by the FPGA. Finally,the processed data is output and displayed on the computer through the USB interface.In order to overcome the disadvantage of underwater phytoplankton movementirregular, the system generates a date trigger unit inside the FPGA. The unit is used to make pre-trigger detection for the two-channel data, when the value of the dataexceeds the set threshold, the system begins to store and process large amounts of data.The system use the IP core of FPGA to make the FFT operations. The IP core can notonly complete the calculation of the signal, but also shortens the development cycle.Finally, the system uses the analog waveform to make test, and the expected resultsare obtained in the actual measurement, which verifies that the system has goodperformance.